The present invention relates generally to communication devices, and more particularly to timing synchronization in a communication device.
In order to facilitate proper communication between digital devices it is typically necessary that the devices have synchronized timing. Generally, existing wireless handheld communication devices, such as cellular telephones, are synchronized at the beginning of transmissions, but are then left to the accuracy of their internal clocks to maintain timing synchronization. However, it is practically impossible for a receiving device and a transmitting device to have the exact same clock frequency. Moreover, internal clocks of devices are subject to various timing anomalies due to such causes as jitter, mechanical shock, temperature drift, and aging effects.
Compensation for timing problems can be accomplished by advancing or delaying an input digital data stream relative to the sampling clock in a transmit filter of the device. However, the advance or delay of samples creates two problems. The first problem is that advancing samples requires dropping samples and requires more computational power to compute the sample in a smaller amount of time. The second problem is the distortion that is added by the advance or delay of a sample. Prior art techniques added more computational power to accommodate for the reduced amount of time to process the sample data. However, output samples were dropped causing the output signal to be distorted, degrading the filter performance. Moreover, input samples were delayed simply by repeating samples, which also introduces distortion.
For most air-interfaces, timing synchronization is generally accomplished in the digital filter sections of a transceiver. In particular, finite-impulse-response (FR) filters have been utilized, to advantage because they are relatively inexpensive due to either the data rate being low or because the input data stream is only one bit wide. However, some new protocols, such as 3GPP (Third Generation Partnership Project), IS-95B, and IS-2000, transmit data with multiple spreading codes at very high data rates. This results in a digital filter that requires much more computation and, therefore, is much more expensive.
Accordingly, what is needed is an apparatus and method to compensate for clock frequency differences between a digital communication device and a digital signal in order to ensure that the data is transferred correctly. It would also be of benefit, to provide a compensation scheme that reduces distortion. Moreover, it would be an advantage to provide timing synchronization with reduced computational complexity and cost without a significant performance reduction.